The prospect of a 2025 debut appeared on Sunday in a post to Chinese social media service Weibo, penned by Yungang Bao of the ...

Open source software rightly gets a lot of attention; open source hardware has its part to play too. One development drawing increasing attention in both technical and executive circles is RISC-V, ...

Chinese chip designer Sophgo, a suspected supplier of AI silicon to Huawei, has been added to the USA’s “Entity List” of orgs ...

The prolific x86 and Arm architectures might soon have another contender to deal with as RISC-V adoption rises.

In short, China must be taken seriously as a rival and a threat to U.S. national security in cyberspace and other domains.

The MIPS Coherence Manager and shared virtual memory (SVM) use an AMBA ACE interface to tie the RISC-V clusters and the I/O coherence unit (IOCU). The manager supports up to eight units, which usually ...

Computing and technological development is a core building block for India to become a developed country by 2047 said Electronics and Information Technology Mi ...

Despite this shift, Imagination maintains a commitment to the RISC-V ecosystem. It is ready to work with developers of RISC-V ...

One VEGA-based SoC ASIC and two DIR V VEGA processor-based development boards designed and developed by C-DAC were launched.

Could the fifth generation of reduced instruction set computing (RISC) dethrone the long-established advanced RISC machine (Arm) and x86 architectures? While the discussion about Arm versus RISC-V is ...